1. Field of the Invention
The present invention relates to a semiconductor device and a semiconductor circuit using the same, which can be applied to a configuration or a circuit which has field transistors and bipolar transistors in combination, for example.
2. Description of the Background Art
FIG. 21 is a circuit diagram showing an example of the configuration of an inverter adopted as a display driver. PMOS transistors Q1 and Q3 are cross-coupled. The transistors Q1 and Q3 have their drains connected to ground GND through NMOS transistors Q2 and Q4, respectively. A potential Vdd ( greater than 0) is given to the sources and back gates of the transistors Q1 and Q3. An input signal SI and a logically inverted version of the input signal SI, obtained through an inverter INV, are given to the gates of the transistors Q4 and Q2, respectively.
Thus, as the input signal SI takes logical xe2x80x9cHxe2x80x9d and xe2x80x9cL,xe2x80x9d potentials of approximately zero and Vdd are given to the drains of the series-connected transistors Q3 and Q4, respectively. That is to say, the transistors Q1 to Q4 constitute an inverter. Furthermore, since the transistors Q1 and Q3 are cross-coupled, the potential at the drains of the transistors Q3 and Q4 is stable against the noise carried on the input signal SI.
When the potential Vdd is set at 100 V or higher in the configuration above, it is possible to realize an inverter which provides an output having a transition width of 100 V or more by using the input signal SI having a transition width of several volts. However, setting the potential Vdd so high requires that the transistors Q1 and Q3 have increased gate breakdown voltage. For this necessity, a structure with a thicker gate oxide film (a field insulating film, generally), called a field transistor, is adopted to the transistors Q1 and Q3.
FIG. 22 is a cross-sectional view showing the structure of a field transistor 200 which can be adopted as the transistors Q1 and Q3. An Nxe2x88x92-type semiconductor layer 2 is formed on a Pxe2x88x92-type substrate 1 and an N+-type semiconductor layer 3 is selectively interposed between them. Above the semiconductor layer 3 (on the side opposite to the substrate 1), field insulating films 8, P-type semiconductor layers 51 and 52, and an N-type semiconductor layer 4 are selectively formed in the main surface of the semiconductor layer 2. The semiconductor layers 51 and 52 face each other with the field insulating film 8 between them and an electrode 9 faces through the field insulating film 8 toward the main surface of the semiconductor layer 2 between the semiconductor layers 51 and 52.
P+-type semiconductor layers 13 and 7 and an N+-type semiconductor layer 6 are formed on the top surfaces of the P-type semiconductor layers 51 and 52 and the N-type semiconductor layer 4, respectively. An electrode 14 is formed on the semiconductor layer 13 and an electrode 10 is connected to the semiconductor layer 7. The electrode 10 is connected also to the semiconductor layer 6 and conductive to the semiconductor layer 2 that functions the back gate of the field transistor 200.
When a potential lower than that of the semiconductor layer 2 is applied to the electrode 9, the conductivity type of the main surface part of the semiconductor layer 2 which faces toward the electrode 9 is inverted to P type. Accordingly, as schematically shown by Arrow 33, application of a potential higher than that of the semiconductor layer 51 to the semiconductor layer 52 causes holes to move from the semiconductor layer 52 to the semiconductor layer 51 through the main surface of the semiconductor layer 2. That is, the field transistor 200 functions as a PMOS transistor. The field insulating film 8 interposed between the electrode 9 and the main surface of the semiconductor layer 2 is tens of times thicker than a common gate insulating film, so that the gate breakdown voltage can be set approximately equal to the breakdown voltage between the source and drain.
However, since the field transistor adopts the field insulating film as its gate insulating film, its effective on-state resistance, which is expressed by a product of the on-state resistance and the element area, is extremely poor. Therefore realizing a display driver which is required to provide a large current output further needs common NMOS transistors Q5 and Q6.
The potential Vdd is supplied to the drain of the transistor Q5, and the source and back gate of the transistor Q6 are connected to ground GND. The gate of the transistor Q5 is connected in common to the drains of the transistors Q3 and Q4 and the input signal SI is given to the gate of the transistor Q6. The source and back gate of the transistor Q5 and the drain of the transistor Q6 are connected in common and an output SO is given from there. However, the gate breakdown voltage of the transistor Q5 cannot be designed so high as that of the field transistor, so that a protective diode D is needed. Such technique is introduced in, for example, xe2x80x9c60V Field NMOS and PMOS transistors for the multi-voltage system integration,xe2x80x9d Proceedings of 2001 International Symposium on Power Semiconductor Devices and ICs, pp.259-262.
The present invention has been made in consideration of the situation shown earlier, and an object of the invention is to provide a semiconductor circuit with high breakdown voltage and large current output, and a semiconductor device applicable to that semiconductor circuit.
According to a first aspect of the present invention, a semiconductor circuit includes P-type first and second field transistors, N-type first and second MOS transistors and an NPN-type first bipolar transistor. The first and second field transistors and the first and second MOS transistors each has a source, a drain and a gate. The first bipolar transistor has a collector, a base and an emitter. A potential is applied to the source of the first field transistor, the source of the second field transistor, and the collector of the first bipolar transistor. This potential is higher than both of a potential applied to the source of the first MOS transistor and a potential applied to the source of the second MOS transistor. The drain of the first field transistor and the drain of the first MOS transistor are connected to the gate of the second field transistor. The drain of the second field transistor is connected to the gate of the first field transistor and the base of the first bipolar transistor. An output signal is obtained at a connection point at which the drain of the second MOS transistor and the emitter of the first bipolar transistor are connected in common. Signals which are complementary to each other are inputted respectively to the gate of the first MOS transistor and the gate of the second MOS transistor.
A large current can be obtained as the output signal because of current amplification by the first bipolar transistor. Furthermore it is not necessary to additionally provide an NMOS transistor together with a protective diode.
Preferably, in the semiconductor circuit, the second field transistor and the first bipolar transistor constitute an insulated-gate bipolar transistor.
Carriers increase because of conductivity modulation, so that a still larger current can be obtained as the output signal.
Preferably, the semiconductor circuit further includes an N-type third MOS transistor. The third MOS transistor has a source, a drain and a gate. A signal is applied to the gate of the third MOS transistor. The signal has a same logic as the signal applied to the gate of the second MOS transistor. The source of the third MOS transistor is connected to the source of the second MOS transistor. The drain of the third MOS transistor is connected, in common, to the gate of the first field transistor, the drain of the second field transistor, and the base of the first bipolar transistor.
The third MOS transistor is on when the second field transistor is off. The voltage between the emitter and the base of the first bipolar transistor can thus be made small to suppress reduction of its breakdown voltage.
In particular, when the second field transistor and the first bipolar transistor constitute an insulated-gate bipolar transistor, the voltage at the pn junction formed by the fifth semiconductor layer and the second semiconductor layer is approximately zero, so that the turning-off operation of the insulated-gate bipolar transistor can be speeded up and the energy loss in switching can be reduced. Also, the third MOS transistor is off when the second field transistor is on, so that the connection between the emitter and the base of the first bipolar transistor is opened and the on-state resistance of the insulated-gate bipolar transistor is not adversely affected.
Preferably, the semiconductor circuit further includes an N-type third field transistor. The third field transistor has a source, a drain, and a gate. The gate of third field transistor is connected, in common, to the drain of the first MOS transistor and the drain of the first field transistor. The source of the third field transistor is connected to the source of the second MOS transistor. The drain of the third field transistor is connected, in common, to the gate of the first field transistor, the drain of the second field transistor, and the base of the first bipolar transistor.
The third field transistor is on when the second field transistor is off. Accordingly it is possible to make small the potential difference between the emitter and the base of the first bipolar transistor to reduce the reduction of its breakdown voltage.
In particular, when the second field transistor and the first bipolar transistor constitute an insulated-gate bipolar transistor, the voltage at the pn junction formed by the fifth semiconductor layer and the second semiconductor layer is approximately zero, so that the turning-off operation of the insulated-gate bipolar transistor can be speeded up and the energy loss in switching can be reduced. Also, the third MOS transistor is off when the second field transistor is on, so that the connection between the emitter and the base of the first bipolar transistor is opened and the on-state resistance of the insulated-gate bipolar transistor is not adversely affected.
According to a second aspect of the invention, a semiconductor circuit includes P-type first and second field transistors, N-type first and second MOS transistors, and first and second bipolar transistors. The first and second field transistors, and the first and second MOS transistors each has a source, a drain and a gate. The first bipolar transistor is of an NPN-type, and the second bipolar transistor is of a PNP-type. These bipolar transistors each has a collector, a base, and an emitter. A potential is applied to the source of the first field transistor and the emitter of the second bipolar transistor. The potential is higher than both of a potential applied to the source of the first MOS transistor and a potential applied to the source of the second MOS transistor. The source of the second field transistor is connected to the emitter of the second bipolar transistor or the base of the second bipolar transistor. The drain of the first field transistor and the drain of the first MOS transistor are connected to the gate of the second field transistor. The drain of the second field transistor is connected to the gate of the first field transistor, the base of the first bipolar transistor, and the collector of the second bipolar transistor. The collector of the first bipolar transistor and the base of the second bipolar transistor are connected to each other.
The first bipolar transistor and the second bipolar transistor constitute a thyristor and a large current can be outputted from the emitter of the first bipolar transistor.
Preferably, in the semiconductor circuit, the source of the second field transistor has is connected to the emitter of the second bipolar transistor. The semiconductor circuit further includes a first resistor. The first resistor is connected between the base of the second bipolar transistor and the emitter of the second bipolar transistor.
A voltage drop caused by the current flowing through the resistor when the second field transistor and the first bipolar transistor are on provides a forward bias between the base and emitter of the second bipolar transistor.
Preferably, the semiconductor circuit further includes a third field transistor. The first and second current electrodes of the third field transistor are connected between the base and the emitter of the second bipolar transistor. The gate of the third field transistor is connected to the gate of the first field transistor.
As the second field transistor is on/off, the third field transistor is off/on, so that the operation of the thyristor can be started easily.
Preferably, in the semiconductor circuit, the back gate of the third field transistor is connected to the collector of the first bipolar transistor.
The back gate of the third field transistor can be used also as the back gate of the second field transistor, the collector of the first bipolar transistor, and the base of the second bipolar transistor. Furthermore the breakdown voltage is not deteriorated.
According to a third aspect of the invention, a semiconductor circuit includes a P-type first and second field transistors, N-type first and second MOS transistors, and a PNP-type first bipolar transistor. The first and second field transistors and the first and second MOS transistors each has a source, a drain and a gate. The first bipolar transistor has a collector, a base, and an emitter. A potential is applied to the source of the first field transistor, the source of the second field transistor, and the emitter of the first bipolar transistor. The potential is higher than both of a potential applied to the source of the first MOS transistor and a potential applied to the source of the second MOS transistor. The drain of the first field transistor and the drain of the first MOS transistor are connected to the gate of the second field transistor. The drain of the second field transistor is connected to the gate of the first field transistor and the collector of the first bipolar transistor. The source of the second field transistor is connected to the base of the first bipolar transistor.
When the second MOS transistor is off and the second field transistor is on, a voltage drop due to the current flowing through the resistor turns on the first bipolar transistor. This enables an output of a large current.
Preferably, in the semiconductor circuit, a back gate of the second field transistor is connected to the base of the first bipolar transistor. The semiconductor circuit further includes a P-type third field transistor. A source, a drain and a gate of the third field transistor are connected to the emitter of the first bipolar transistor, the collector of the first bipolar transistor, and the base of the first bipolar transistor, respectively.
The third field transistor apparently increases the current amplification factor of the first bipolar transistor.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.